Hey everyone,
I recently built a simple RISC-V CPU on an FPGA — and in this video, I’ll show you what I learned, how it works, and why RISC-V is actually a big deal.
Most processors today are controlled by companies like Intel or ARM.
But RISC-V is different.
It’s open, free, and anyone can build their own CPU — even you.
And yes, I actually got one running on an FPGA.
What is RISC-V
So what exactly is RISC-V?
RISC-V is an Instruction Set Architecture, or ISA. That just means it defines the instructions a CPU understands.
Think of it like a language:
- Software is written in C or Python
- The CPU only understands machine instructions
- RISC-V defines those instructions
The key difference?
RISC-V is open-source, unlike ARM or x86.
What I Built
Let me show you what I built.
This is a very basic RISC-V CPU with:
- A register file
- An ALU (Arithmetic Logic Unit)
- A control unit
It can execute simple instructions like:
- Add
- Subtract
- Load and store
Then I implemented it using Verilog and ran it on an FPGA.
Why It Matters
So why should you care?
Because RISC-V lets you:
- Build your own processor
- Customize instructions
- Learn how CPUs actually work
And you don’t need permission or licenses.
That’s a huge shift in how hardware is designed.
What You Can Do
If you’re interested, you can start with:
- Learning basic Verilog
- Building simple modules like an ALU
- Running a RISC-V core on FPGA
You don’t need to be an expert to begin.
🌐 [Call to Action – 4:15–4:40]
I’ve written a full beginner guide on my site:
👉 risc-v.ca
You’ll find:
- Step-by-step tutorials
- Code examples
- FPGA projects
Link is in the description.
If you want to learn RISC-V by actually building things, subscribe — I’ll be posting more hands-on tutorials.